I am a CAD Software Engineer at Intel Corporation, with a charter to drive productivity and improvement through automation and CAD flow development.

Before joining Intel I have worked 10 years at ON Semiconductor (now called ONSemi). At ONSemi I was in the Foundation IP Library group, as Library Characterization and Digital HDL Modeling Team Lead. At ONSemi my areas of expertise were, Standard cell and I/O library development, Digital Library Liberty Characterization expert (SiliconSmart, Liberate), Complex and special case characterization solutions, Characterization flow development, Expert in analog simulation and debug to find the root cause, IBIS characterization and development for GPIO and complex libraries, Supporting complex IBIS characterization for entire company, CeltIC Noise characterization for GPIO and Complex IO libraries, Maintain automation system for digital library development, Reduce Audit Findings through verification checks, Speed up the generation of view development, Maintain current and past library, technology, and library/cell data, Writing and cleaning up IPM test development scripts to ensure database remains accurate, HDL development for GPIO and Complex IO libraries, Verilog,Tmax, and Tessent views, Create templates for each cell in each of the views mentioned above, Create digital test benches for each cell in the Verilog to verify functionality with each release, Maintain code for 23 verification scripts (Infrastructure), Interface with ASIC chip development methodology groups, Intern and new hire mentor.

Programming experience: Perl, Python, TCL.